تحميل Computer hardware and architecture basics
Computer Softwares
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يوجد صيانة لقسم تحميل الدورات لذلك يمكنك مشاهدة الدورة بشكل مباشر من هنا بدلا من التحميل لحين الانتهاء من صيانة القسم
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Personal Computer Architecture
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Graphics Processing Unit GPU
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Fetch Decode Execute Cycle and the Accumulator
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Fetch Decode Execute Cycle in more detail
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Processor Addressing Modes
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Introduction to Logic Gates
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Logic Gate Combinations
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Logic Gate Expressions
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Logic Gates and the Ripple Carry Adder
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Dynamic Random Access Memory DRAM Part 1 Memory Cell Arrays
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Dynamic Random Access Memory DRAM Part 2 Read and Write Cycles
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Dynamic Random Access Memory DRAM Part 3 Binary Decoders
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Dynamic Random Access Memory DRAM Part 4 Multiplexers and Demultiplexers
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Dynamic Random Access Memory DRAM Part 5 DIMM Organisation
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Dynamic Random Access Memory DRAM Part 6 Burst Mode and Bank Interleaving
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Dynamic Random Access Memory DRAM Part 7 Memory Address Mapping
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Computer Networks Part One LANs and WANs
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Computer Networks Part Two Network Hardware
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Computer Networks Part Three Ethernet
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Latches and Flip Flops 1 The SR Latch
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Latches and Flip Flops 2 The Gated SR Latch
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Latches and Flip Flops 3 The Gated D Latch
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Latches and Flip Flops 4 – The Clocked D Latch
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Latches and Flip Flops 5 – D Type Flip Flop
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Karnaugh Maps – Introduction
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Karnaugh Maps with 4 Variables
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Karnaugh Maps – Simplify Boolean Expressions
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The Hard Drive Buffer
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RISC versus CISC
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Little Man Computer 1 Introduction
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Little Man Computer 2 Branching Code
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Little Man Computer 3 Loops
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Harvard Architecture versus Von Neumann Architecture
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Byte Order Endianness
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OLD The Accumulator Register
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The Fetch Decode Execute Cycle
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The Accumulator
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Pipeline Architecture
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