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Full Adder in Xilinx using Verilog VHDL Full Adder Verilog VHDL in VLSI by Engineering Funda

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Lessons List | 13 Lesson

OR Gate in Xilinx using Verilog VHDL OR Gate Verilog VHDL in VLSI by Engineering Funda

OR Gate in Xilinx using Verilog VHDL OR Gate Verilog VHDL in VLSI by Engineering Funda

AND Gate in Xilinx using Verilog VHDL AND Gate Verilog VHDL in VLSI by Engineering Funda

AND Gate in Xilinx using Verilog VHDL AND Gate Verilog VHDL in VLSI by Engineering Funda

Half Adder in Xilinx using Verilog VHDL Half Adder Verilog VHDL in VLSI by Engineering Funda

Half Adder in Xilinx using Verilog VHDL Half Adder Verilog VHDL in VLSI by Engineering Funda

Full Adder in Xilinx using Verilog VHDL Full Adder Verilog VHDL in VLSI by Engineering Funda

Full Adder in Xilinx using Verilog VHDL Full Adder Verilog VHDL in VLSI by Engineering Funda

8 to 3 Encoder in Xilinx using Verilog VHDL 8 to 3 Encoder Verilog VHDL by Engineering Funda

8 to 3 Encoder in Xilinx using Verilog VHDL 8 to 3 Encoder Verilog VHDL by Engineering Funda

3 to 8 Decoder in Xilinx using Verilog VHDL 3 to 8 Decoder Verilog VHDL by Engineering Funda

3 to 8 Decoder in Xilinx using Verilog VHDL 3 to 8 Decoder Verilog VHDL by Engineering Funda

Multiplexer in Xilinx using Verilog VHDL Multiplexer Verilog VHDL in VLSI by Engineering Funda

Multiplexer in Xilinx using Verilog VHDL Multiplexer Verilog VHDL in VLSI by Engineering Funda

Demultiplexer in Xilinx using Verilog VHDL Demultiplexer Verilog VHDL in VLSI by Engineering Funda

Demultiplexer in Xilinx using Verilog VHDL Demultiplexer Verilog VHDL in VLSI by Engineering Funda

BCD to Seven Segment Display in Xilinx using Verilog VHDL BCD to Seven Segment Display Verilog VHDL

BCD to Seven Segment Display in Xilinx using Verilog VHDL BCD to Seven Segment Display Verilog VHDL

JK Flip Flop in Xilinx using Verilog VHDL JK Flip Flop Verilog VHDL in VLSI by Engineering Funda

JK Flip Flop in Xilinx using Verilog VHDL JK Flip Flop Verilog VHDL in VLSI by Engineering Funda

D Flip Flop in Xilinx using Verilog VHDL D Flip Flop Verilog VHDL in VLSI by Engineering Funda

D Flip Flop in Xilinx using Verilog VHDL D Flip Flop Verilog VHDL in VLSI by Engineering Funda

BCD Counter in Xilinx using Verilog VHDL BCD Counter Verilog VHDL in VLSI by Engineering Funda

BCD Counter in Xilinx using Verilog VHDL BCD Counter Verilog VHDL in VLSI by Engineering Funda

Finite State Machine in Xilinx using Verilog VHDL Finite State Machine Verilog VHDL in VLSI

Finite State Machine in Xilinx using Verilog VHDL Finite State Machine Verilog VHDL in VLSI

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4.4

335 Reviews

Madhavi Alajangi

Excellent

2026-05-26

venkatavyshnavi yanamala

NICE

2026-05-22

Biju Yashwanth

good explanation but improve the quality

2026-05-21

Naziya Shaik

Good teaching

2026-05-15

Karthi.N

Excellent

2026-05-01

Srikanth Reddy M

Good

2026-05-01

DEEPAK KUMAR M

Good

2026-04-17

MOHAMMAD TUFFEL MOMIN

Yes

2026-04-07

Borugula Rupesh

Good

2026-03-29

Ian Mark Palacao

The lesson was very educational and well explained.

2026-03-20

Rachana shettar

Teaching is good

2026-03-12

Praveen Kumar

This course is good

2026-03-09

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Course Description

Verilog VHDL course in hindi, in this course Explore the powerful hardware description languages used for digital circuit design and FPGA/ASIC development in this comprehensive course.

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